EP1S30F780C7

EP1S30F780C7 FPGAs Overview

Introduction 

The Stratix® family of FPGAs is based on a 1.5-V, 0.13-µm, all-layer copper SRAM process, with densities of up to 79,040 logic elements (LEs) and up to 7.5 Mbits of RAM. Stratix devices offer up to 22 digital signal processing (DSP) blocks with up to 176 (9-bit × 9-bit) embedded multipliers, optimized for DSP applications that enable efficient implementation of high-performance filters and multipliers. Stratix devices support various I/O standards and also offer a complete clock management solution with its hierarchical clock structure with up to 420-MHz performance and up to 12 phase-locked loops (PLLs).  

Features 

■ 10,570 to 79,040 LEs; see Table 1–1

■ Up to 7,427,520 RAM bits (928,440 bytes) available without reducing logic resources

■ TriMatrixTM memory consisting of three RAM block sizes to implement true dual-port memory and first-in first-out (FIFO) buffers

■ High-speed DSP blocks provide dedicated implementation of multipliers (faster than 300 MHz), multiply-accumulate functions,and finite impulse response (FIR) filters

■ Up to 16 global clocks with 22 clocking resources per device region

■ Up to 12 PLLs (four enhanced PLLs and eight fast PLLs) per device provide spread spectrum, programmable bandwidth, clock switchover, real-time PLL reconfiguration, and advanced multiplication and phase shifting

■ Support for numerous single-ended and differential I/O standards

■ High-speed differential I/O support on up to 116 channels with up to 80 channels optimized for 840 megabits per second (Mbps)

■ Support for high-speed networking and communications bus standards including RapidIO, UTOPIA IV, CSIX, HyperTransportTM technology, 10G Ethernet XSBI, SPI-4 Phase 2 (POS-PHY Level 4),and SFI-4

■ Differential on-chip termination support for LVDS

■ Support for high-speed external memory, including zero bus turnaround (ZBT) SRAM, quad data rate (QDR and QDRII) SRAM,double data rate (DDR) SDRAM, DDR fast cycle RAM (FCRAM),and single data rate (SDR) SDRAM

■ Support for 66-MHz PCI (64 and 32 bit) in -6 and faster speed-grade devices, support for 33-MHz PCI (64 and 32 bit) in -8 and faster speed-grade devices

■ Support for 133-MHz PCI-X 1.0 in -5 speed-grade devices

■ Support for 100-MHz PCI-X 1.0 in -6 and faster speed-grade devices

■ Support for 66-MHz PCI-X 1.0 in -7 speed-grade devices

■ Support for multiple intellectual property megafunctions from Altera MegaCore® functions and Altera Megafunction Partners Program (AMPPSM) megafunctions

■ Support for remote configuration updates

The INTEL Embedded - FPGAs (Field Programmable Gate Array) series EP1S30F780C7 is Stratix FPGA 30K FBGA-780, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at bitfoic.com, and you can also search for other FPGAs products.

Features

EPC devices offer the following features:

■ Single-chip configuration solution for Altera ACEX 1K, APEX 20K (including APEX 20K, APEX 20KC, and APEX 20KE), APEX II, Arria GX, Cyclone, Cyclone II, FLEX

10K (including FLEX 10KE and FLEX 10KA), Mercury, Stratix II, and Stratix II GX devices

■ Contains 4-, 8-, and 16-Mb flash memories for configuration data storage

■ On-chip decompression feature almost doubles the effective configuration density

■ Standard flash die and a controller die combined into single stacked chip package

■ External flash interface supports parallel programming of flash and external processor access to unused portions of memory

■ Flash memory block or sector protection capability using the external flash interface

■ Supported in EPC4 and EPC16 devices