A power supply is a device or system that provides electrical energy to an output load or device. Its primary function is to convert electrical power from a source, typically the electrical grid or a battery, into a form suitable for use by electronic devices and other electrical equipment. Xilinx 7 series FPGA has a power supply. The previous articles talked about the internal logic of FPGA. In this article, we will talk about the power supply of 7 series FPGA.
Firstly, We can have a look at the spartan7 series. Usually, we need to use the following power rails:
1. VCCINT
FPGA internal core voltage. The range that does not damage the FPGA device is -0.5V~1.1V. For the -2 and -1 spartan7 series, the normal operating voltage is 0.95V~1.05V, and the recommended operating voltage is 1.00V. For the -1L spartan7 series, the normal operating voltage is 0.92V~0.98V, and the recommended operating voltage is 0.95V.
2. VCCAUX
Auxiliary supply voltage. The range that does not damage the FPGA device is -0.5V~2.0V. The normal working voltage is 1.71V~1.89V. The recommended operating voltage is 1.80V.
3. VCCBRAM
The supply voltage of the internal Block RAM. The range that does not damage the FPGA device is -0.5V~1.1V. For the -2 and -1 spartan7 series, the normal operating voltage is 0.95V~1.05V, and the recommended operating voltage is 1.00V. For the -1L spartan7 series, the normal operating voltage is 0.92V~0.98V, and the recommended operating voltage is 0.95V.
4. VCCO
HRBANK interface voltage. It needs to be consistent with the signal level of the external device, and its range without damaging the FPGA device is -0.5V~3.6V. The normal working voltage is 1.14V~3.465V. It is recommended that the working voltage be consistent with the external signal level.
5. VCCADC
XADC supply voltage. The range that does not damage the FPGA device is -0.5V~2.0V. The normal working voltage is 1.71V~1.89V. The recommended operating voltage is 1.80V. To obtain the minimum power-on/power-off current consumption and ensure that the IO remains tri-state when powered on, each power rail of the spartan7 series FPGA needs a certain power-on/power-off sequence.
The power-on sequence is VCCINT, VCCBRAM, VCCAUX, VCCO, and the power-off sequence is exactly the opposite of the power-on sequence. In addition, if the VCCINT and VCCBRAM power rails are consistent, they can be powered on/off at the same time. The VCCAUX and VCCO power rails can also be powered on/off at the same time. There is no power-on sequence for other power rails.
FPGA internal core voltage. The range that does not damage the FPGA device is -0.5V~1.1V. For the artix7 series of -3, -2, -2LE (1.0V), -1, -1Q and -1M, the normal operating voltage is 0.95V~1.05V, and the recommended operating voltage is 1.00V. For the -1LI (0.95V) artix7 series, the normal operating voltage is 0.92V~0.98V, and the recommended operating voltage is 0.95V. For the -2LE (0.9V) artix7 series, the normal operating voltage is 0.87V~0.93V, and the recommended operating voltage is 0.90V.
2. VCCAUX
Auxiliary supply voltage. The range that does not damage the FPGA device is -0.5V~2.0V. The normal working voltage is 1.71V~1.89V. The recommended operating voltage is 1.80V.
3. VCCBRAM
The supply voltage of the internal Block RAM. The range that does not damage the FPGA device is -0.5V~1.1V. For the artix7 series of -3, -2, -2LE (1.0V), -2LE (0.9V), -1, -1Q and -1M, the normal operating voltage is 0.95V~1.05V, and the recommended operating voltage is 1.00V. For the -1LI (0.95V) artix7 series, the normal operating voltage is 0.92V~0.98V, and the recommended operating voltage is 0.95V.
4. VCCO
HRBANK interface voltage. It needs to be consistent with the signal level of the external device, and its range without damaging the FPGA device is -0.5V~3.6V. The normal working voltage is 1.14V~3.465V. It is recommended that the working voltage be consistent with the external signal level.
5. VCCADC
XADC supply voltage. The range that does not damage the FPGA device is -0.5V~2.0V. The normal working voltage is 1.71V~1.89V. The recommended operating voltage is 1.80V.
6. MGTAVCC
GTP transceiver core voltage. The range that does not damage the FPGA device is -0.5V~1.1V. The normal working voltage is 0.97V~1.03V. The recommended operating voltage is 1.00V.
7. MGTAVTT
GTP transceiver terminal matching voltage. The range that does not damage the FPGA device is -0.5V~1.32V. The normal working voltage is 1.17V~1.23V. The recommended operating voltage is 1.20V.
To obtain the minimum power-on/power-off current consumption and ensure that the IO remains three-state when powered on, the artix7 series FPGA requires a certain power-on/power-off sequence for each power rail.
The power-on sequence is VCCINT, VCCBRAM, VCCAUX, VCCO, and the power-off sequence is exactly the opposite of the power-on sequence. In addition, if the VCCINT and VCCBRAM power rails are consistent, they can be powered on/off at the same time. The VCCAUX and VCCO power rails can also be powered on/off at the same time. There is no power-on sequence for other power rails.
The power-on sequence of the GTP transceiver is VCCINT, MGTAVCC, MGTAVTT or MGTAVCC, VCCINT, MGTAVTT. The power outage sequence is exactly the opposite.
FPGA internal core voltage. The range that does not damage the FPGA device is -0.5V~1.1V. For the kintex7 series of -3, -2, -2LE (1.0V), -1, -1M and -1LM, the normal operating voltage is 0.97V~1.03V, and the recommended operating voltage is 1.00V. For the -2LE (0.9V) kintex7 series, the normal operating voltage is 0.87V~0.93V, and the recommended operating voltage is 0.90V. For the -2LI (0.95V) kintex7 series, the normal operating voltage is 0.93V~0.97V, and the recommended operating voltage is 0.95V.
Auxiliary supply voltage. The range that does not damage the FPGA device is -0.5V~2.0V. The normal working voltage is 1.71V~1.89V. The recommended operating voltage is 1.80V.
The supply voltage of the internal Block RAM. The range that does not damage the FPGA device is -0.5V~1.1V. For the kintex7 series of -3, -2, -2LE (1.0V), -1, -1M, and -1LM, the normal operating voltage is 0.97V~1.03V, and the recommended operating voltage is 1.00V. For the -2LE (0.9V) kintex7 series, the normal operating voltage is 0.87V~0.93V, and the recommended operating voltage is 0.90V. For the -2LI (0.95V) kintex7 series, the normal operating voltage is 0.93V~0.97V, and the recommended operating voltage is 0.95V.
The interface voltage of HR BANK needs to be consistent with the signal level of the external device, and its range without damaging the FPGA device is -0.5V~3.6V. The normal working voltage is 1.14V~3.465V. It is recommended that the working voltage be consistent with the external signal level.
The interface voltage of HP BANK needs to be consistent with the signal level of the external device. The range that does not damage the FPGA device is -0.5V~2.0V. The normal working voltage is 1.14V~1.89V. It is recommended that the working voltage be consistent with the external signal level.
5. VCCAUX_IO
IO auxiliary voltage. The range that does not damage the FPGA device is -0.5V~2.06V. The normal working voltage is 1.14V~1.89V/2.06V. The recommended operating voltage is 1.8V/2V.
XADC supply voltage. The range that does not damage the FPGA device is -0.5V~2.0V. The normal working voltage is 1.71V~1.89V. The recommended operating voltage is 1.80V.
GTX transceiver core voltage. The range that does not damage the FPGA device is -0.5V~1.1V. For applications with QPLL≤10.3125GHz, the normal operating voltage is 0.97V~1.08V, and the recommended operating voltage is 1.00V. For applications with QPLL>10.3125GHz, the normal operating voltage is 1.02V~1.08V, and the recommended operating voltage is 1.05V.
8. MGTAVTT
GTX transceiver terminal matching voltage. The range that does not damage the FPGA device is -0.5V~1.32V. The normal working voltage is 1.17V~1.23V. The recommended operating voltage is 1.20V.
9. MGTVCCAUX
GTX transceiver auxiliary voltage. The range that does not damage the FPGA device is -0.5V~1.935V. The normal working voltage is 1.75V~1.85V. The recommended operating voltage is 1.80V.
GTX transceiver calibration voltage. The range that does not damage the FPGA device is -0.5V~1.32V. The normal working voltage is 1.17V~1.23V. The recommended operating voltage is 1.20V.
To obtain the minimum power-on/power-off current consumption and ensure that the IO remains tri-state when powered on, each power rail of the kintex7 series FPGA needs a certain power-on/power-off sequence.
The power-on sequence is VCCINT, VCCBRAM, VCCAUX, VCCAUX_IO, VCCO. The power-off sequence is exactly the opposite of the power-on sequence. In addition, if the VCCINT and VCCBRAM power rails are consistent, they can be powered on/off at the same time. VCCAUX_IO, VCCAUX, and VCCO power rails can also be powered on/off at the same time. There is no power-on sequence for other power rails.
The power-on sequence of GTX transceivers is VCCINT, MGTAVCC, MGTAVTT or MGTAVCC, VCCINT, MGTAVTT. The power outage sequence is exactly the opposite. MGTVCCAUX no order.
1. VCCINT
FPGA internal core voltage. The range that does not damage the FPGA device is -0.5V~1.1V. The normal working voltage is 0.97V~1.03V, and the recommended working voltage is 1.00V.
2. VCCAUX
Auxiliary supply voltage. The range that does not damage the FPGA device is -0.5V~2.0V. The normal working voltage is 1.71V~1.89V. The recommended operating voltage is 1.80V.
3. VCCBRAM
The supply voltage of the internal Block RAM. The range that does not damage the FPGA device is -0.5V~1.1V. The range that does not damage the FPGA device is -0.5V~1.1V. The normal working voltage is 0.97V~1.03V, and the recommended working voltage is 1.00V.
4. VCCO
The interface voltage of HR BANK needs to be consistent with the signal level of the external device, and its range without damaging the FPGA device is -0.5V~3.6V. The normal working voltage is 1.14V~3.465V. It is recommended that the working voltage be consistent with the external signal level.
The interface voltage of HP BANK needs to be consistent with the signal level of the external device. The range that does not damage the FPGA device is -0.5V~2.0V. The normal working voltage is 1.14V~1.89V. It is recommended that the working voltage be consistent with the external signal level.
5. VCCAUX_IO
IO auxiliary voltage. The range that does not damage the FPGA device is -0.5V~2.06V. The normal working voltage is 1.14V~1.89V/2.06V. The recommended operating voltage is 1.8V/2V.
6. VCCADC
XADC supply voltage. The range that does not damage the FPGA device is -0.5V~2.0V. The normal working voltage is 1.71V~1.89V. The recommended operating voltage is 1.80V.
7. MGTAVCC
GTX/GTH transceiver core voltage. The range that does not damage the FPGA device is -0.5V~1.1V. For applications with QPLL≤10.3125GHz, the normal operating voltage is 0.97V~1.08V, and the recommended operating voltage is 1.00V. For applications with QPLL>10.3125GHz, the normal operating voltage is 1.02V~1.08V, and the recommended operating voltage is 1.05V.
8. MGTAVTT
GTX/GTH transceiver terminal matching voltage. The range that does not damage the FPGA device is -0.5V~1.32V. The normal working voltage is 1.17V~1.23V. The recommended operating voltage is 1.20V.
9. MGTVCCAUX
GTX/GTH transceiver auxiliary voltage. The range that does not damage the FPGA device is -0.5V~1.935V. The normal working voltage is 1.75V~1.85V. The recommended operating voltage is 1.80V.
10. MGTAVTTRCAL
GTX/GTH transceiver calibration voltage. The range that does not damage the FPGA device is -0.5V~1.32V. The normal working voltage is 1.17V~1.23V. The recommended operating voltage is 1.20V.
To obtain the minimum power-on/power-off current consumption and ensure that the IO remains tri-state when powered on, each power rail of the virtex7 series FPGA needs a certain power-on/power-off sequence.
The power-on sequence is VCCINT, VCCBRAM, VCCAUX, VCCAUX_IO, VCCO. The power-off sequence is exactly the opposite of the power-on sequence. In addition, if the VCCINT and VCCBRAM power rails are consistent, they can be powered on/off at the same time. VCCAUX_IO, VCCAUX, and VCCO power rails can also be powered on/off at the same time. There is no power-on sequence for other power rails.
The power-on sequence of GTX/GTH transceivers is VCCINT, MGTAVCC, MGTAVTT or MGTAVCC, VCCINT, MGTAVTT. The power outage sequence is exactly the opposite. MGTVCCAUX no order.
In general, since spartan7 has no MGT, its power supply structure is the simplest; artix7 is relatively complex; while kintex7 and virtex7 have no obvious difference in power supply structure and are the most complex.
Currently, the power supply solutions for 7 series FPGA designed by users with power-on/power-off sequences are generally divided into two types. One is to use the input EN and output PGood of each power chip to control the sequence, and the other is to use a dedicated power management chip. To control the startup/shutdown time of each power rail of the FPGA.
FPGA (Field-Programmable Gate Array) is an integrated circuit, a type of programmable chip, that allows engineers to program custom digital logic. It can change its hardware logic based on the program, with the primary purpose of enabling engineers to redesign and reconfigure their chips faster and cheaper, whenever they want. However, nothing in the world is ideal, and FPGA chips also have limitations!
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