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Embedded System: STM32F407 Microcontroller Bus Architecture and GPIO-Explained

3/31/2023

Embedded technology is one of the key core technologies of the entire IoT system. It is equivalent to the brain of the perception layer, which unifies the sensor part of the perception layer to achieve specific functions and is the underlying basic part of the entire Internet of Things.

The core part of embedded development is chip development. At present, embedded development mainly includes a single-chip microcomputer, embedded Linux, and so on. Among them, single-chip microcomputers occupy more than half of the Internet of Things industry due to their powerful functions and high-cost performance.

 

 

What is MCU?

 

Single-chip microcomputer, also known as a single-chip microcontroller, is not a chip that completes a certain logic function but integrates a computer system into a chip. It is equivalent to a microcomputer. Compared with computers, single-chip microcomputers only lack I/O devices. In a nutshell: a chip becomes a computer. Its small size, lightweight and cheap price provide convenient conditions for learning, application, and development.

This article selects the STM32F407 series chips launched by ST (Standard Semiconductor). It ST (STMicroelectronics) launched a high-performance microcontroller based on the ARM Cortex™-M4 core, which uses a 90-nanometer NVM process and ART (Adaptive Real-Time Memory Accelerator™).

According to relevant market statistics, the shipment of STM32 series chips in 2017 was 1 billion. As one of the world's largest semiconductor companies, ST has a wide range of product lines, including sensors, power devices, automotive products, and embedded processor solutions, and plays an important role in the IoT ecosystem. Among them, MCU is one of the most important businesses. According to official data, in 2017, ST occupied about 19% of the general microcontroller market. The company has more than 800 STM32 products and more than 50,000 customers.

Figure1-STM32F407

Figure1-STM32F407

 

 

 

 STM32F407G Microcontroller Bus Architecture

 

 

Figure2-STM32F407G Microcontroller Bus Architecture

Figure2-STM32F407G Microcontroller Bus Architecture

The main system consists of a 32-bit multilayer AHB bus matrix. The bus matrix is used for access arbitration management between master buses. Arbitration adopts a round-robin scheduling algorithm. The bus matrix can realize the following partial interconnection:

 

The eight master buses are:

  • Cortex-M4 core I bus, D bus, and S bus
  • DMA1 memory bus, DMA2 memory bus;
  • DMA2 peripheral bus
  • Ethernet DMA bus
  • USB OTG HS DMA
  •  

Seven controlled buses:

  • FLASH ICode
  • FLASH DCode
  • SRAM1(112KB)
  • SRAM2(16KB);
  • SRAM3(64KB) ((for STM32F42xx and STM32F43xx series devices only););AHB1 and AHB2 FSMC

 

Let's explain in detail the knowledge of several buses in the figure.

 

  • I Bus (S0): This bus connects the instruction bus of the Cortex-M4 core to the bus matrix. The core fetches instructions through this bus. The objects accessed by this bus are memory including code.
  • D Bus (S1): This bus connects the Cortex-M4 data bus and 64KB CCM data RAM to the bus matrix. The core uses this bus for immediate loads and debug access.
  • S-bus (S2): This bus connects the system bus of the Cortex-M4 core to the bus matrix. This bus is used to access data located in peripherals or SRAM.
  • DMA Memory Bus (S3, S4): This bus is used to connect the DMA memory bus masters to the bus matrix. DMA performs memory data transfers to and from memory over this bus.
  • DMA peripheral bus: This bus is used to interface the DMA peripheral main bus interface to the bus matrix. DMA accesses AHB peripherals or performs memory-to-memory data transfers through this bus. Ethernet DMA bus: This bus connects the Ethernet DMA master interface to the bus matrix. Ethernet DMA accesses data to memory through this bus.
  • USB OTG HS DMA bus (S7): This bus connects the USB OTG HS DMA master interface to the bus matrix. USB OTG HS DMA loads/stores data to memory through this bus.

 

 

 STM32F407 GPIO-Explained

 

  • Grouping

 

STM32F407 has 7 groups of IO. They are GPIOA~GPIOG respectively, each group of IO has 16 IO ports, a total of 112 IO ports are usually called PAx, PBx, PCx, PDx, PEx, PFx, PGx, where x is 0-15.

 

  • GPIO multiplexing

 

STM32F4 has many built-in peripherals, and the external pins of these peripherals are shared with GPIO. That is to say, a pin can have many functions, but it is an IO port by default. If you want to use a GPIO built-in peripheral function pin, you need GPIO multiplexing. When this GPIO is used as a built-in peripheral, It's called reuse. For example, a serial port is a GPIO multiplexed as a serial port.

 

  • GPIO input mode

 

GPIO_Mode_IN_FLOATING Floating input

GPIO_Mode_IPU pull-up input

GPIO_Mode_IPD pull-down input

GPIO_Mode_AIN Analog input

 

 

  • GPIO output mode

 

GPIO_Mode_Out_OD Open-drain output (with pull-up or pull-down)

GPIO_Mode_AF_OD multiplexed open-drain output (with pull-up or pull-down)

GPIO_Mode_Out_PP push-pull output (with pull-up or pull-down)

GPIO_Mode_AF_PP multiplexed push-pull output (with pull-up or pull-down)

 

  • GPIO maximum output speed

2MHZ (low speed)

25MHZ (medium speed)

50MHZ (fast)

100MHZ (high speed)

 

STM32 standard peripheral library

The STM32 standard peripheral library is a firmware function package consisting of programs, data structures, and macros, including the performance characteristics of all microcontroller peripherals. The library also includes driver descriptions and application examples for each peripheral, providing an intermediate API for developers to access the underlying hardware.

Using the firmware function library, developers can easily apply each peripheral without deep knowledge of the underlying hardware details.

Therefore, using the solid-state function library can greatly reduce the time for developers to develop and use on-chip peripherals, thereby reducing development costs. Each peripheral driver consists of a set of functions that cover all the functionality of the peripheral. At the same time, the STM32 official also gave a large number of sample codes for learning.

 

 How does GPIO Work in an LED Circuit?

 

In embedded systems, it is often necessary to control many external devices or circuits with simple structures. Some of these devices must be controlled by the CPU, and some require the CPU to provide input signals. It is more complicated to use the traditional serial port or parallel port to control the device. Therefore, a "general-purpose programmable I/O port", that is, GPIO, is usually provided on the embedded microprocessor.

 

LED hardware schematic diagram

This circuit will realize the operation of the GPIO port of STM32F407 by operating the LED on and off. Look at the hardware schematic diagram related to the development board LED

Figure4-LED schematic diagram

 

According to the schematic diagram and the characteristics of the LED lights, we know that when the LED0, LED1, and LED2 pins output low levels, the three LED lights will glow. Conversely, when the output is high, the three LED lights will go out.

The LED0, LED1, and LED2 pins correspond to GPIOE_3, GPIOE_4, and GPIOG_9 on the STM32F407 chip, respectively. Therefore, the on-off operation of the LED can be converted into the pin output operation of the STM32F407.

 

 

 

 

Why Use STM32F407?

 

(1) High-cost performance.

The purchase price of a single STM32F407VET6 model is about 13 yuan, and the batch price will be lower.

 

(2) The market is large and there are many development materials

As the most popular chip in the world, most companies in the market currently develop based on the STM32 series of chips, and corporate recruitment requires STM32. At the same time, there are many mature solutions and related forums on the Internet.

 

(3) Powerful performance

The STM32F407 offers the performance of a Cortex™-M4 core (with a floating point unit) operating at 168 MHz. When executing from Flash memory, STM32F407/417 can provide 210 DMIPS/566 CoreMark performance, and utilize STMicroelectronics' ART accelerator to realize a FLASH zero wait state. DSP instructions and floating-point units expand the application range of the product.

 

(4) Abundant peripheral resources

2 x USB OTG (one of which supports HS)

Audio: Dedicated audio PLL and 2 full-duplex I²S

Up to 15 communication interfaces (including 6 USARTs up to 11.25 Mb/s, 3 SPIs up to 45 Mb/s, 3 I²C, 2 CAN, and 1 SDIO)

Analog: 2 12-bit DACs, 3 12-bit ADCs at 2.4 MSPS or 7.2 MSPS (interleaved mode)

Up to 17 timers: 16 and 32-bit timers up to 168 MHz

Easily expand memory capacity with flexible static memory controller supporting Compact Flash, SRAM, PSRAM, NOR, and NAND memory

True Random Number Generator Based on Analog Electronics Technology

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