The  XCR22V10  is  the  first  SPLD  to  combine  high  perfor-mance with low power, without the need for "turbo bits" orother  power  down  schemes.  To  achieve  this,  Xilinx  hasused their FZP design technique, which replaces conven-tional  sense  amplifier  methods  for  implementing  productterms (a technique that has been used in PLDs since thebipolar  era)  with  a  cascaded  chain  of  pure  CMOS  gates.This  results  in  the  combination  of  low  power  and  highspeed  that  has  previously  been  unattainable  in  the  PLDarena. For 3V operation, Xilinx offers the XCR22LV10 thatoffers high speed and low power in a 3V implementation.

The  XCR22V10  uses  the  familiar  AND/OR  logic  arraystructure,     which     allows     direct     implementation     ofsum-of-products equations. This device has a programma-ble AND array which drives a fixed OR array. The OR sumof products feeds an "Output Macro Cell" (OMC), which canbe individually configured as a dedicated input, a combina-torial output, or a registered output with internal feedback.

The  XCR22V10 implements  logic functions     assum-of-products     expressions     in     a     programmable-AND/fixed-OR logic array. User-defined functions are cre-ated by programming the connections of input signals intothe array. User-configurable output structures in the form ofI/O macrocells further increase logic flexibility.