The Arria GX family of devices combines 3.125 Gbps serial transceivers with reliable packaging technology and a proven logic array. Arria GX devices include 4 to 12 high-speed transceiver channels, each incorporating clock data recovery (CDR) technology and embedded SERDES circuitry designed to support PCI-Express, Gigabit Ethernet, SDI, SerialLite II, XAUI, and Serial RapidIO protocols, along with the ability to develop proprietary, serial-based IP using its Basic mode. The transceivers build upon the success of the Stratix II GX family. The Arria GX FPGA technology offers a 1.2-V logic array with the right level of performance and dependability needed to support these mainstream protocols.

Arria GX devices incorporate up to 12 high-speed serial transceiver channels that build on the success of the Stratix II GX device family.

Arria GX transceivers are structured into full-duplex (transmitter and receiver) four-channel groups called transceiver blocks located on the right side of the device. The transceiver blocks can be configured to support the following serial connectivity protocols (functional modes):
■ PCI Express (PIPE)
■ Gigabit Ethernet (GIGE)
■ XAUI
■ Basic (600 Mbps to 3.125 Gbps)
■ SDI (HD, 3G)
■ Serial RapidIO (1.25 Gbps, 2.5 Gbps, 3.125 Gbps)
Transceivers within each block are independent and have their own set of dividers. Therefore, each transceiver can operate at different frequencies.
Each block can select from two reference clocks to provide two clock domains that each transceiver can select from.